Use the translator embedded within Xpedition (formerly DxDesigner). Create a new project, select Import , and add your Altium .SchDoc files.
Point the translator to the primary Altium project file ( *.PrjPcb ).
In the high-stakes world of PCB design, interoperability is no longer a luxury—it is a necessity. Engineering teams often face the daunting challenge of migrating legacy projects or entire design libraries from one ecosystem to another. Two of the most powerful, yet architecturally distinct, platforms in the industry are and Siemens Xpedition Enterprise .
: Map Altium’s blind, buried, or through-hole via definitions to Xpedition padstack properties. altiumr to xpeditionr translator user guide exclusive
Don't assume the design is ready for manufacturing immediately. You must verify several critical areas:
Xpedition manages hierarchical and repeated blocks differently than Altium. If your Altium design utilizes multi-channel nesting, consider flattening the structure or explicitly mapping the channels to distinct physical components to prevent component mapping mismatches during netlist generation. 3. Database and Library Consolidation
Layers, components, traces, vias, planes, and copper pours are converted into the Xpedition design database. In the high-stakes world of PCB design, interoperability
Print this checklist. Laminate it. Use it every time.
Siemens EDA provides specialized import utilities specifically tuned for Altium files. Access these tools via the Xpedition Data Management or Start Menu folders under Siemens EDA Utilities.
If the Altium source is corrupted or missing sub-layers, the translator may produce an incomplete Xpedition package. : Map Altium’s blind, buried, or through-hole via
Conceptually, the translator establishes a mapping between Altium primitives and Xpedition constructs, normalizes data, and applies rule-based translations to footprints and nets. The output consists of a translated design file along with a detailed validation report.
| Problem | Symptom | The Translator Fix (Not Altium) | | :--- | :--- | :--- | | | Via holes appear, but no annular rings | Run translator with -convertMicroViaAsStandard true via command line | | Solder Mask Inverted | Pads are covered, copper is exposed | In mapping file, add <SwapMaskLayers>true</SwapMaskLayers> | | Component RefDes Shifted | Reference designators are 10mm away from body | Re-run with -preserveTextJustification true flag | | Netlist Corruption | "Net '$N_0001' not found" | This is a legacy Altium unique ID mismatch. Use -regenerateUIDs true |
Operates on an integrated Central Library ( .lmc ) architecture. Data is strictly segmented into Symbols, Padstacks, Cell Graphics, and Part Numbers. The schematic ( .dnf /xDX Designer) and layout ( .pcb /Xpedition Layout) dynamically link to this single source of truth. The Siemens Conversion Utility
Note: The official, updated guide is primarily found on Siemens SupportNet , requiring a Siemens support account. Phase 1: Pre-Translation "Tidy Up" (Preparation)
: Save your Altium PCB files in ASCII format (*.PcbDoc saved as PCB ASCII). The translator typically cannot process Altium's proprietary binary formats directly.